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Breakeven demonstration of quantum low-density parity-check codes

Generated by a local model (nvidia/Gemma-4-26B-A4B-NVFP4) from a scientific paper, claim-checked against the full text. Provenance is open by design.

Can we trade connectivity for efficiency?

Scaling quantum computers requires quantum error correction (QEC)—the process of using multiple noisy physical qubits to form a single stable "logical" qubit. For years, the industry has leaned heavily on the surface code. This method works well on two-dimensional grids where qubits only talk to their immediate neighbors. However, the surface code is incredibly expensive in terms of qubit overhead. It requires hundreds or even thousands of physical qubits to produce one reliable logical qubit. Researchers have proposed a more efficient alternative: quantum low-density parity-check (qLDPC) codes. These codes offer much higher encoding rates. This means they pack more logical information into fewer physical qubits. But they require complex, long-range connections between qubits. These connections are often difficult to build in most hardware architectures.

The connectivity bottleneck

The central question facing QEC researchers is whether we can implement these high-rate qLDPC codes without making the hardware prohibitively complex. Current state-of-the-art demonstrations of qLDPC codes, such as the work by Wang et al. [21], have relied on superconducting chips. These chips use bespoke, long-range couplers built into the silicon to facilitate non-local interactions. While successful, this approach is rigid. The hardware is essentially hardwired for a specific code. The authors of this paper ask if a more flexible platform can help. Specifically, they test if a trapped-ion system can implement a wide variety of codes. These range from topological to qLDPC codes. They aim to do this on the same device without changing the physical wiring or moving ions around.

The cost of moving ions

Until now, the prevailing wisdom in trapped-ion computing was that all-to-all connectivity comes at a heavy temporal cost. In many trapped-ion architectures, performing a gate between distant ions requires physically transporting them through the trap. This "shuttling" consumes a massive fraction of the system's runtime. It also requires dedicated "coolant" ions to absorb heat generated by motion. Previous attempts to implement complex codes often hit a wall. The overhead of managing the ions sometimes outweighed the benefits of the error correction itself. As noted in the paper, in some systems, up to 50% of the ions are used solely for cooling. Transport can also dominate the execution time.

Eliminating the transport tax

The researchers bypassed these hurdles using a novel implementation of the optical-metastable-ground (OMG) architecture. Instead of physically moving ions to perform mid-circuit measurements (MCM)—the process of checking for errors while the rest of the qubits remain protected—they use internal energy levels. They utilize phase-coherent shuttling between manifolds within a single ion. This allows for in-place measurement and reset without any physical ion transport. As shown in [Figure 1D], the sequence involves "shelving" the entire chain into a metastable state. They then selectively "deshelve" only the ancilla ions for readout. Finally, they use those same ancillae to sympathetically cool the chain. This effectively turns the ancillae into multi-purpose tools for both error detection and thermal management.

To maximize the utility of their 40-ion chain, the team also employed an iterative qubit-mapping algorithm. Two-qubit gate fidelities (the accuracy of entangling operations) vary across different ion pairs in the trap. The authors did not just assign qubits randomly. Instead, they mapped the code's required connections to the highest-performing ion pairs available. This reduced average infidelity by up to 50% .

Breaking the breakeven barrier

The results demonstrate that this flexible, transport-free approach can support high-rate codes. The authors report implementing five distinct qLDPC codes. These include the Bivariate-Bicycle (BB5) and Generalized-Bicycle (GB4) families. When comparing their BB5 implementation to the superconducting baseline [21], the authors find a significant improvement. Their logical error rate for Z errors is 9× better. For X errors, it is 4× better. This means the code is much more resilient to the types of noise that flip the phase of a qubit.

More importantly, the study reaches the "breakeven" regime. In QEC, breakeven is the point where the logical qubit lasts as long as, or longer than, its underlying physical components. The authors report that several code instances achieved logical lifetimes ($T_N$) that meet or slightly exceed the physical qubit lifetime. Specifically, for the GB[[26, 2, 5]] code, they measured a logical lifetime of $3.95 \pm 0.68$ s. This exceeded the physical qubit lifetime of $3.3 \pm 0.9$ s [Table II]. The survival curves in confirm that these logical qubits maintain coherence across multiple syndrome cycles.

Figure 2
Figure 2. Survival probabilities 1 −εL for the BB5 and GB4 codes versus number of syndrome cycles, for X (left) and Z (right) eigenstate memory experiments. Circles and solid curves indicate the probability that no logical fault occurred in any of the encoded logical qubits.

This provides a clear path toward fault tolerance.

Implications for the road to FTQC

If this OMG-based architecture can scale, the implications for Fault-Tolerant Quantum Computing (FTQC) are substantial. First, it suggests that the "connectivity tax" of qLDPC codes can be paid with light and lasers. This could preserve the precious runtime of a quantum processor by avoiding mechanical ion movement. Second, the ability to swap between different code families proves hardware flexibility. The device can run topological, concatenated, and qLDPC codes without reconfiguration.

However, there is a catch: the reliance on post-selection. To deal with "leakage"—where an ion falls out of its computational state during measurement—the authors currently discard certain data. They reject any shots where leakage is detected. As shown in, this rejection rate climbs as the number of syndrome cycles increases.

Figure 6
Figure 6. Leakage detection and rejection rates for various codes and number of syndrome cycles r. BB5-[[30,4,5]] exhibits the worst rejection rates, with r = 1 and r = 6 having rejection rates of 17.8% and 74.8%, respectively.

It reaches nearly 75% for certain configurations. While the authors' simulations in [Figures 7 and 8] suggest that converting this leakage into "erasures" (known error locations) would only degrade performance by 10–20%, a production system cannot afford to throw away three-quarters of its data. The next step is to implement conditional reset to turn those leaks into usable erasures.

Figures from the paper

Figure 1
Figure 1. A Ion trap depicted with six ions, with gates realized via counter-propagating Raman beams (green) steered from either side with acousto-optic deflectors (AOD).
Figure 3
Figure 3. A 2D lattice on which we depict the Tanner graphs of a standard [[18, 2, 3]] (dashed square) and rotated [[16, 2, 4]] (rotated square) toric codes.
Figure 4
Figure 4. Distribution of two-qubit (MS) gate noise as measured by DRB. DRB). Figure 4 shows the distribution of noise rates we measured.
Figure 5
Figure 5. We use that scaled noise rate to inform two-qubit 11 0: (27, 5) 0: (30, 16) 0: (29, 3) 0: (22, 12) 0: (25, 1) 1: (27, 5) 1: (30, 16) 1: (29, 3) 1: (22, 12) 2: (27, 5) 2: (30, 16) 2: (29, 3) 3: (27, 5) 3: (30, 16) Set-index: qubit pair 0.0000 0.0025 0.0050 0.0075 0.0100 0.0125 0.0150 0.0175 0.0200
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